Implementation of Floating-Point VSIPL Functions on FPGA-Based Reconfigurable Computers Using High-Level Languages

Conference/Journal: High Performance Embedded Computing 2005
Authors: Dr Malachy Devlin , Robin Bruce (ISLI), Dr Stephen Marshall (Strathclyde)
Date: September 20th-22nd 2005
Location: MIT Lincoln Labs, Massachusetts, USA
Conference/Journal Website: Link
Abstract: Download
Presentation: Download
Full Paper: N/A
Notes: Part of my EngD work. DIME-C was used to implement an FFT and a Matrix Multiply to create a floating-point pulse compression unit, part of the VSIPL project. Mal presented a poster at this conference.