This page lists the publications that I’ve had on the subject of Reconfigurable Computing. I used to suggest that people visit wikipedia for an overview, but I don’t anymore. The wikipedia page is barely intelligible. Reconfigurable computing is not a complex subject, a useful definition is as follows:
Reconfigurable or FPGA computing is a class of custom computing that uses Field Programmable Gate Arrays as the principle compute element. A custom electronic circuit is created on the FPGA for each individual compute problem. To succeed in this requires planning, a co-operative client, good high-level tools, good hardware and lots of experience.
I have written a page on the skills a reconfigurable computing engineer requires. It’s not a comprehensive list, but it’s a start.
From 2004 – 2008 I worked on an Engineering Doctorate programme, overseen by the ISLI, sponsored by Nallatech and supervised by the University of Strathclyde. From late 2008 onwards, I have been working with Maxeler Technologies in London.
I wrote this white paper on developing HPC FPGA applications, this on the the Intel-Nallatech collaboration (AAL, FSB-FPGA etc.), and had an article published in Tech Online that took a generalised look at programming FPGAs with high-level languages.
Everything else on here is peer-reviewed academic stuff. I tried starting a blog about other people’s RC research, but it never got enough traffic to encourage me to maintain it.
If anyone’s here trying to get some basic information on reconfigurable computing, I’d happily answer any questions you stick in the comments box at the bottom of the page.
2008
- OpenFPGA CoreLib core library interoperability effort – Parallel Computing
2007
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Standards for FPGA-based High-Performance Embedded Computing - MILCOM 2007 (Rejected)
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A Streaming FFT on 3GSPS ADC Data using Core Libraries and DIME-C - HPEC 2007
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Minimum Entropy Restoration Using FPGAs and High-Level Techniques - EUSIPCO 2007
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OpenFPGA CoreLib Core Library Interoperability Effort – RSSI 2007
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An Elementary Transcendental Function Core Library for Reconfigurable Computing - RSSI 2007
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Programming an FPGA-based Super Computer Using a C-to-VHDL Compiler: DIME-C - AHS 2007
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Restoration of Star-Field Images Using High-Level Languages and Core Libraries - MRSC 2007
2006
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Implementing Algorithms on FPGAs Using High-Level Languages and Low-Level Libraries - SC 2006
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Lessons Learned Implementing the VSIPL API on Reconfigurable Computers - MAPLD 2006
5 responses so far ↓
King Rossco // July 25, 2008 at 4:05 pm |
Alright, not to be a [rooster] about it or anything, but shouldn’t you have the most recent at the top? That’s what I do with my millions of papers and proceedings anyway.
Robin // July 25, 2008 at 4:13 pm |
Nah, I take the point. I’ll sort it out, and not have my [most excremental] ones at the top. I think I’ll give them a page each now that I’ve learned how to create sub-pages…
Robin // August 4, 2008 at 4:05 pm |
Right, fixed. I’ve also decided to make my research pages a swearing free zone, editing out my and your expletives. In recompense you may turn the air blue on my main blog to your heart’s content.
Del // September 22, 2008 at 10:17 pm |
This research sounds interesting. Just read the Wikipedia page and it all pretty much went over my head. I’m shocked at myself.
Robin // September 30, 2008 at 11:54 am |
Hi Del,
I wouldn’t worry so much about not understanding the wikipedia page, it’s suffering from too many cooks at the moment, and doesn’t even make much sense to me. Basically it’s all about being able to rapidly create custom hardware for compute-intensive applications.